Re: tcatm's 4-way SSE2 for Linux 32/64-bit is in 0.3.10

Figures: tcatm
Quote from: knightmb on August 15, 2010, 5:02:16 PM UTC

If I didn’t know better, I would say the key is the CPU cache size. Seems all the CPU that run slower have 2 MB or less onboard cache, where as the Core i5 starts with at least 3MB of onboard CPU cache.

That’s unlikely. The loop accesses 432 bytes of data. That should fit in most caches.